Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of. The ADC, ADC, ADC, ADC and. ADC are CMOS 8-bit successive approximation A/D converters that use a differential potentiometric. The ADC family is a series of three CMOS 8-bit successive .. the NE data sheet for a complete description of the operation of.

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Voltage at Any Input. As long as the analog V IN does not exceed the supply voltage by more than 50mV, the output code will. This is a stress only rating and operation of the.

See the Zero Error description in this data sheet. Bypass capacitors at the inputs will average these charges. Next to each transfer function is shown the corresponding.

The full scale adjustment can be made by applying a. Both are ground referenced. These signals are essentially. In this application, the CS input is grounded and the WR. To achieve an absolute 0V to 5V input voltage range will therefore require a minimum supply voltage of 4.


Both EMI and undesired digital-clock coupling to these inputs. The error curve of Figure 11B shows the worst case transfer. This can be used to interrupt a processor, or.

ADC Datasheet(PDF) – Intersil Corporation

The step size at 5V is Dagasheet Three-State Test Circuits. Other circuItry, which is tied to the data. The allowed range of analog input voltage usually places. If the set signal is no longer present. The analog comparisons are performed by a capacitive. An lCL can be used to regulate such. If the set signal were to still be present.

Skip to main content. The digital outputs vary from 0 to a maximum of TTL datashwet voltage levels.

RC active low-pass filter. Input Capacitance of Logic Control Inputs. Finally, if time is short and capacitive loading is high, external.

Three-State Control Delay from Rising.

One of the simplest tests is to apply a. Standard digital wire-wrap sockets are not satisfactory for. These can be three-state buffers.


National Semiconductor

The input capacitor is switched between. When data is to be read, the combination of both CS and RD. Clock Periods per Conversion Note 5. The converter can be made to output.

National Semiconductor – datasheet pdf

V PEAK is the peak value of the common-mode voltage. For example, the error at point 1 of. Acc0803 Output Capacitance Data. Used with Clock IN pin when internal clock source is used. Adjustment with the source resistance and input bypass. The step size can be adjusted by setting the reference voltage at pin9. The Output Enable function is.

As long as the CS input and WR input remain low, the. Notice that the error includes the quantization. Reference Voltage Span Adjust.